244 lines
4.7 KiB
Markdown
244 lines
4.7 KiB
Markdown
# ruapu
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Detect CPU ISA features with single-file
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<table>
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<tr><td>CPU</td><td>✅ x86, x86-64<br/>✅ arm, aarch64</td><td rowspan=3>
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```c
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#define RUAPU_IMPLEMENTATION
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#include "ruapu.h"
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int main()
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{
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// initialize ruapu once
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ruapu_init();
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// now, tell me if this cpu has avx2
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int has_avx2 = ruapu_supports("avx2");
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return 0;
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}
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```
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</td></tr>
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<tr><td>OS</td><td>✅ Windows<br/>✅ Linux<br/>✅ macOS<br/>✅ Android<br/>✅ iOS</td></tr>
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<tr><td>Compiler</td><td>✅ GCC<br/>✅ Clang<br/>✅ MSVC<br/>✅ MinGW</td></tr>
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</table>
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## Let's ruapu
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<table>
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<tr><td>
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Compile ruapu test program
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```shell
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# GCC / MinGW
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gcc main.c -o ruapu
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```
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```shell
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# Clang
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clang main.c -o ruapu
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```
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```shell
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# MSVC
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cl.exe /Fe: ruapu.exe main.c
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```
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</td>
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<td>
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Run ruapu in command line
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```shell
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./ruapu
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mmx = 1
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sse = 1
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sse2 = 1
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sse3 = 1
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ssse3 = 1
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sse41 = 1
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sse42 = 1
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sse4a = 1
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xop = 0
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... more lines omitted ...
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```
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</td></tr>
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</table>
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<details>
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<summary>Github-hosted runner result (Linux)</summary>
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```
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mmx = 1
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sse = 1
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sse2 = 1
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sse3 = 1
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ssse3 = 1
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sse41 = 1
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sse42 = 1
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sse4a = 1
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xop = 0
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avx = 1
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f16c = 1
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fma = 1
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avx2 = 1
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avx512f = 0
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avx512bw = 0
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avx512cd = 0
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avx512dq = 0
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avx512vl = 0
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avx512vnni = 0
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avx512bf16 = 0
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avx512ifma = 0
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avx512vbmi = 0
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avx512vbmi2 = 0
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avx512fp16 = 0
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avxvnni = 0
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avxvnniint8 = 0
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avxifma = 0
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```
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</details>
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<details>
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<summary>Github-hosted runner result (macOS)</summary>
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```
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mmx = 1
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sse = 1
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sse2 = 1
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sse3 = 1
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ssse3 = 1
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sse41 = 1
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sse42 = 1
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sse4a = 0
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xop = 0
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avx = 1
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f16c = 1
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fma = 1
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avx2 = 1
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avx512f = 0
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avx512bw = 0
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avx512cd = 0
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avx512dq = 0
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avx512vl = 0
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avx512vnni = 0
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avx512bf16 = 0
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avx512ifma = 0
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avx512vbmi = 0
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avx512vbmi2 = 0
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avx512fp16 = 0
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avxvnni = 0
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avxvnniint8 = 0
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avxifma = 0
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```
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</details>
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<details>
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<summary>Github-hosted runner result (macOS M1)</summary>
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```
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neon = 1
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vfpv4 = 1
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cpuid = 0
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asimdhp = 1
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asimddp = 1
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asimdfhm = 1
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bf16 = 0
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i8mm = 0
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sve = 0
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sve2 = 0
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svebf16 = 0
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svei8mm = 0
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svef32mm = 0
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```
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</details>
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<details>
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<summary>Github-hosted runner result (Windows)</summary>
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```
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mmx = 1
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sse = 1
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sse2 = 1
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sse3 = 1
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ssse3 = 1
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sse41 = 1
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sse42 = 1
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sse4a = 1
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xop = 0
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avx = 1
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f16c = 1
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fma = 1
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avx2 = 1
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avx512f = 0
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avx512bw = 0
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avx512cd = 0
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avx512dq = 0
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avx512vl = 0
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avx512vnni = 0
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avx512bf16 = 0
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avx512ifma = 0
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avx512vbmi = 0
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avx512vbmi2 = 0
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avx512fp16 = 0
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avxvnni = 0
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avxvnniint8 = 0
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avxifma = 0
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```
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</details>
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## Features
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* Detect **CPU ISA with single-file**   
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_`sse2`, `avx`, `avx512f`, `neon`, etc._
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* Detect **vendor extended ISA**    
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_apple `amx`, risc-v vendor ISA, etc._
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* Detect **richer ISA on Windows ARM**  
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_`IsProcessorFeaturePresent()` returns little ISA information_
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* Detect **`x86-avx512` on macOS correctly** 
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_macOS hides it in `cpuid`_
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* Detect **new CPU's ISA on old systems** 
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_they are usually not exposed in `auxv` or `MISA`_
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* Detect **CPU hidden ISA**       
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_`fma4` on zen1, ISA in hypervisor, etc._
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## Supported ISA _ (more is comming ... :)_
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|CPU|ISA|
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|:---:|---|
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|x86|`mmx` `sse` `sse2` `sse3` `ssse3` `sse41` `sse42` `sse4a` `xop` `avx` `f16c` `fma` `fma4` `avx2` `avx512f` `avx512bw` `avx512cd` `avx512dq` `avx512vl` `avx512vnni` `avx512bf16` `avx512ifma` `avx512vbmi` `avx512vbmi2` `avx512fp16` `avxvnni` `avxvnniint8` `avxifma`|
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|arm|`edsp` `neon` `vfpv4`|
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|aarch64|`neon` `vfpv4` `cpuid` `asimdhp` `asimddp` `asimdfhm` `bf16` `i8mm` `sve` `sve2` `svebf16` `svei8mm` `svef32mm`|
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|mips||
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|powerpc||
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|loongarch||
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|risc-v||
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## Techniques inside ruapu
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ruapu is implemented in C language to ensure the widest possible portability.
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ruapu determines whether the CPU supports certain instruction sets by trying to execute instructions and detecting whether an `Illegal Instruction` exception occurs. ruapu does not rely on the cpuid instructions and registers related to the CPU architecture, nor does it rely on the `MISA` information and system calls of the operating system. This can help us get more detailed CPU ISA information.
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## Repos that use ruapu
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* [ncnn](https://github.com/Tencent/ncnn)  _High-performance neural network inference framework_
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* [libllm](https://github.com/ling0322/libllm)  _Efficient inference of large language models_
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## Credits
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* [@nihui](https://github.com/nihui)  _Write the initial POC code and ruapu maintainer_
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* [@kernelbin](https://github.com/kernelbin)  _Implement exception handling for Windows_
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* [@zchrissirhcz](https://github.com/zchrissirhcz)  _Detect x86 FMA4_
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## License
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MIT License
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