dreamcmi/ruapu
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

detect risc-v thead extension (#90)

Browse Source
This commit is contained in:
nihui 2024-03-31 21:51:47 +08:00 committed by GitHub
parent b7518ab97d
commit e9d8d95c45
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
3 changed files with 37 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
README.md
View File

@ -69,7 +69,7 @@ _`fma4` on zen1, ISA in hypervisor, etc._
|powerpc|`vsx`|
|s390x|`zvector`|
|loongarch|`lsx` `lasx`|
|risc-v|`i` `m` `a` `f` `d` `c` `zfa` `zfh` `zfhmin` `zicsr` `zifencei` `zmmul` |
|risc-v|`i` `m` `a` `f` `d` `c` `zfa` `zfh` `zfhmin` `zicsr` `zifencei` `zmmul` `xtheadba` `xtheadbb` `xtheadbs` `xtheadcondmov` `xtheadfmemidx` `xtheadfmv` `xtheadmac` `xtheadmemidx` `xtheadmempair` `xtheadsync` `xtheadvdot`|
|openrisc| `orbis32` `orbis64` `orfpx32` `orfpx64` `orvdx64` |
## Let's ruapu

12
main.c
View File

@ -128,6 +128,18 @@ int main()
PRINT_ISA_SUPPORT(zicsr)
PRINT_ISA_SUPPORT(zifencei)
PRINT_ISA_SUPPORT(xtheadba)
PRINT_ISA_SUPPORT(xtheadbb)
PRINT_ISA_SUPPORT(xtheadbs)
PRINT_ISA_SUPPORT(xtheadcondmov)
PRINT_ISA_SUPPORT(xtheadfmemidx)
PRINT_ISA_SUPPORT(xtheadfmv)
PRINT_ISA_SUPPORT(xtheadmac)
PRINT_ISA_SUPPORT(xtheadmemidx)
PRINT_ISA_SUPPORT(xtheadmempair)
PRINT_ISA_SUPPORT(xtheadsync)
PRINT_ISA_SUPPORT(xtheadvdot)
#elif __openrisc__
PRINT_ISA_SUPPORT(orbis32)
PRINT_ISA_SUPPORT(orbis64)

24
ruapu.h
View File

@ -306,6 +306,18 @@ RUAPU_INSTCODE(zicsr, 0xc0102573); // csrr a0, time
RUAPU_INSTCODE(zifencei, 0x0000100f); // fence.i
RUAPU_INSTCODE(zmmul, 0x02a50533) // mul a0,a0,a0
RUAPU_INSTCODE(xtheadba, 0x00a5150b) // th.addsl a0,a0,a0,#0
RUAPU_INSTCODE(xtheadbb, 0x1005150b) // th.srri a0,a0,#0
RUAPU_INSTCODE(xtheadbs, 0x8805150b) // th.tst a0,a0,#0
RUAPU_INSTCODE(xtheadcondmov, 0x40a5150b) // th.mveqz a0,a0,a0
RUAPU_INSTCODE(xtheadfmemidx, 0x40a1650b) // th.flrw a0,sp,a0,#0
RUAPU_INSTCODE(xtheadfmv, 0xc005150b) // th.fmv.x.hw a0,fa0
RUAPU_INSTCODE(xtheadmac, 0x20a5150b) // th.mula a0,a0,a0
RUAPU_INSTCODE(xtheadmemidx, 0x1801450b) // th.lbia a0,(sp),#0,#0
RUAPU_INSTCODE(xtheadmempair, 0xe0a1450b) // th.lwd a0,a0,(sp),#0,3
RUAPU_INSTCODE(xtheadsync, 0x0180000b) // th.sync
RUAPU_INSTCODE(xtheadvdot, 0x8000600b) // th.vmaqa.vv v0,v0,v0
#endif
#undef RUAPU_INSTCODE
@ -435,6 +447,18 @@ RUAPU_ISAENTRY(zicsr)
RUAPU_ISAENTRY(zifencei)
RUAPU_ISAENTRY(zmmul)
RUAPU_ISAENTRY(xtheadba)
RUAPU_ISAENTRY(xtheadbb)
RUAPU_ISAENTRY(xtheadbs)
RUAPU_ISAENTRY(xtheadcondmov)
RUAPU_ISAENTRY(xtheadfmemidx)
RUAPU_ISAENTRY(xtheadfmv)
RUAPU_ISAENTRY(xtheadmac)
RUAPU_ISAENTRY(xtheadmemidx)
RUAPU_ISAENTRY(xtheadmempair)
RUAPU_ISAENTRY(xtheadsync)
RUAPU_ISAENTRY(xtheadvdot)
#elif __openrisc__
RUAPU_ISAENTRY(orbis32)
RUAPU_ISAENTRY(orbis64)