446 lines
14 KiB
C
446 lines
14 KiB
C
// SPDX-License-Identifier: MIT
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// Copyright (c) 2024 nihui (https://github.com/nihui)
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// Copyright (c) 2024 kernelbin (https://github.com/kernelbin)
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//
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// ruapu --- detect cpu isa features with single-file
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#ifndef RUAPU_H
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#define RUAPU_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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void ruapu_init();
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int ruapu_supports(const char* isa);
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const char* const* ruapu_rua();
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#ifdef RUAPU_IMPLEMENTATION
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#include <setjmp.h>
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#include <string.h>
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#if defined _WIN32
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#include <windows.h>
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#if WINAPI_FAMILY == WINAPI_FAMILY_APP
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// uwp does not support veh :(
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#if defined (_MSC_VER)
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#pragma message("warning: ruapu does not support UWP yet.")
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#else
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#warning ruapu does not support UWP yet.
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#endif
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static int ruapu_detect_isa(const void* some_inst)
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{
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(void)some_inst;
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return 0;
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}
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#else // WINAPI_FAMILY == WINAPI_FAMILY_APP
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static int g_ruapu_sigill_caught = 0;
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static jmp_buf g_ruapu_jmpbuf;
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typedef const void* ruapu_some_inst;
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static LONG CALLBACK ruapu_catch_sigill(struct _EXCEPTION_POINTERS* ExceptionInfo)
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{
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if (ExceptionInfo->ExceptionRecord->ExceptionCode == EXCEPTION_ILLEGAL_INSTRUCTION)
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{
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g_ruapu_sigill_caught = 1;
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longjmp(g_ruapu_jmpbuf, -1);
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}
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return EXCEPTION_CONTINUE_SEARCH;
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}
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static int ruapu_detect_isa(const void* some_inst)
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{
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g_ruapu_sigill_caught = 0;
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PVOID eh = AddVectoredExceptionHandler(1, ruapu_catch_sigill);
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if (setjmp(g_ruapu_jmpbuf) == 0)
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{
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((void (*)())some_inst)();
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}
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RemoveVectoredExceptionHandler(eh);
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return g_ruapu_sigill_caught ? 0 : 1;
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}
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#endif // WINAPI_FAMILY == WINAPI_FAMILY_APP
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#elif defined __ANDROID__ || defined __linux__ || defined __APPLE__ || defined __FreeBSD__ || defined __NetBSD__ || defined __OpenBSD__
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#include <signal.h>
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static int g_ruapu_sigill_caught = 0;
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static sigjmp_buf g_ruapu_jmpbuf;
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typedef void (*ruapu_some_inst)();
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static void ruapu_catch_sigill(int signo, siginfo_t* si, void* data)
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{
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(void)signo;
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(void)si;
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(void)data;
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g_ruapu_sigill_caught = 1;
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siglongjmp(g_ruapu_jmpbuf, -1);
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}
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static int ruapu_detect_isa(ruapu_some_inst some_inst)
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{
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g_ruapu_sigill_caught = 0;
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struct sigaction sa = { 0 };
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struct sigaction old_sa;
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sa.sa_flags = SA_ONSTACK | SA_RESTART | SA_SIGINFO;
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sa.sa_sigaction = ruapu_catch_sigill;
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sigaction(SIGILL, &sa, &old_sa);
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if (sigsetjmp(g_ruapu_jmpbuf, 1) == 0)
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{
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some_inst();
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}
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sigaction(SIGILL, &old_sa, NULL);
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return g_ruapu_sigill_caught ? 0 : 1;
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}
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#endif // defined _WIN32 || defined __ANDROID__ || defined __linux__ || defined __APPLE__ || defined __FreeBSD__ || defined __NetBSD__ || defined __OpenBSD__
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#if defined _WIN32
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#if defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) || defined(_M_X64)
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#ifdef _MSC_VER
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#define RUAPU_INSTCODE(isa, ...) __pragma(section(".text")) __declspec(allocate(".text")) static unsigned char ruapu_some_##isa[] = { __VA_ARGS__, 0xc3 };
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#else
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#define RUAPU_INSTCODE(isa, ...) __attribute__((section(".text"))) static unsigned char ruapu_some_##isa[] = { __VA_ARGS__, 0xc3 };
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#endif
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#elif __aarch64__ || defined(_M_ARM64)
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#ifdef _MSC_VER
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#define RUAPU_INSTCODE(isa, ...) __pragma(section(".text")) __declspec(allocate(".text")) static unsigned int ruapu_some_##isa[] = { __VA_ARGS__, 0xd65f03c0 };
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#else
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#define RUAPU_INSTCODE(isa, ...) __attribute__((section(".text"))) static unsigned int ruapu_some_##isa[] = { __VA_ARGS__, 0xd65f03c0 };
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#endif
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#elif __arm__ || defined(_M_ARM)
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#if __thumb__
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#ifdef _MSC_VER
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#define RUAPU_INSTCODE(isa, ...) __pragma(section(".text")) __declspec(allocate(".text")) static unsigned int ruapu_some_##isa[] = { __VA_ARGS__, 0x4770 };
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#else
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#define RUAPU_INSTCODE(isa, ...) __attribute__((section(".text"))) static unsigned int ruapu_some_##isa[] = { __VA_ARGS__, 0x4770 };
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#endif
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#else
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#ifdef _MSC_VER
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#define RUAPU_INSTCODE(isa, ...) __pragma(section(".text")) __declspec(allocate(".text")) static unsigned int ruapu_some_##isa[] = { __VA_ARGS__, 0xe12fff1e };
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#else
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#define RUAPU_INSTCODE(isa, ...) __attribute__((section(".text"))) static unsigned int ruapu_some_##isa[] = { __VA_ARGS__, 0xe12fff1e };
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#endif
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#endif
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#endif
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#else // defined _WIN32
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#if defined(__i386__) || defined(__x86_64__) || __s390x__
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#define RUAPU_INSTCODE(isa, ...) static void ruapu_some_##isa() { asm volatile(".byte " #__VA_ARGS__ : : : ); }
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#elif __aarch64__ || __arm__ || __mips__ || __riscv || __loongarch__
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#define RUAPU_INSTCODE(isa, ...) static void ruapu_some_##isa() { asm volatile(".word " #__VA_ARGS__ : : : ); }
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#elif __powerpc__
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#define RUAPU_INSTCODE(isa, ...) static void ruapu_some_##isa() { asm volatile(".long " #__VA_ARGS__ : : : ); }
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#endif
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#endif // defined _WIN32
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#if defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) || defined(_M_X64)
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RUAPU_INSTCODE(mmx, 0x0f, 0xdb, 0xc0) // pand mm0,mm0
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RUAPU_INSTCODE(sse, 0x0f, 0x54, 0xc0) // andps xmm0,xmm0
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RUAPU_INSTCODE(sse2, 0x66, 0x0f, 0xfe, 0xc0) // paddd xmm0,xmm0
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RUAPU_INSTCODE(sse3, 0xf2, 0x0f, 0x7c, 0xc0) // haddps xmm0,xmm0
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RUAPU_INSTCODE(ssse3, 0x66, 0x0f, 0x38, 0x06, 0xc0) // phsubd xmm0,xmm0
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RUAPU_INSTCODE(sse41, 0x66, 0x0f, 0x38, 0x3d, 0xc0) // pmaxsd xmm0,xmm0
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RUAPU_INSTCODE(sse42, 0x66, 0x0f, 0x38, 0x37, 0xc0) // pcmpgtq xmm0,xmm0
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RUAPU_INSTCODE(sse4a, 0x66, 0x0f, 0x79, 0xc0) // extrq xmm0,xmm0
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RUAPU_INSTCODE(xop, 0x8f, 0xe8, 0x78, 0xb6, 0xc0, 0x00) // vpmadcswd xmm0,xmm0,xmm0,xmm0
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RUAPU_INSTCODE(avx, 0xc5, 0xfc, 0x54, 0xc0) // vandps ymm0,ymm0,ymm0
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RUAPU_INSTCODE(f16c, 0xc4, 0xe2, 0x7d, 0x13, 0xc0) // vcvtph2ps ymm0,xmm0
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RUAPU_INSTCODE(fma, 0xc4, 0xe2, 0x7d, 0x98, 0xc0) // vfmadd132ps ymm0,ymm0,ymm0
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RUAPU_INSTCODE(fma4, 0xc4, 0xe3, 0xfd, 0x68, 0xc0, 0x00) // vfmaddps ymm0,ymm0,ymm0,ymm0
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RUAPU_INSTCODE(avx2, 0xc5, 0xfd, 0xfe, 0xc0) // vpaddd ymm0,ymm0,ymm0
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RUAPU_INSTCODE(avx512f, 0x62, 0xf1, 0x7c, 0x48, 0x58, 0xc0) // vaddps zmm0,zmm0,zmm0
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RUAPU_INSTCODE(avx512bw, 0x62, 0xf1, 0x7d, 0x48, 0xfd, 0xc0) // vpaddw zmm0,zmm0,zmm0
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RUAPU_INSTCODE(avx512cd, 0x62, 0xf2, 0xfd, 0x48, 0x44, 0xc0) // vplzcntq zmm0,zmm0
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RUAPU_INSTCODE(avx512dq, 0x62, 0xf1, 0x7c, 0x48, 0x54, 0xc0) // vandps zmm0,zmm0,zmm0
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RUAPU_INSTCODE(avx512vl, 0x62, 0xf2, 0xfd, 0x28, 0x1f, 0xc0) // vpabsq ymm0,ymm0
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RUAPU_INSTCODE(avx512vnni, 0x62, 0xf2, 0x7d, 0x48, 0x52, 0xc0) // vpdpwssd zmm0,zmm0,zmm0
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RUAPU_INSTCODE(avx512bf16, 0x62, 0xf2, 0x7e, 0x48, 0x52, 0xc0) // vdpbf16ps zmm0,zmm0,zmm0
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RUAPU_INSTCODE(avx512ifma, 0x62, 0xf2, 0xfd, 0x48, 0xb4, 0xc0) // vpmadd52luq zmm0,zmm0,zmm0
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RUAPU_INSTCODE(avx512vbmi, 0x62, 0xf2, 0x7d, 0x48, 0x75, 0xc0) // vpermi2b zmm0,zmm0,zmm0
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RUAPU_INSTCODE(avx512vbmi2, 0x62, 0xf2, 0x7d, 0x48, 0x71, 0xc0) // vpshldvd zmm0,zmm0,zmm0
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RUAPU_INSTCODE(avx512fp16, 0x62, 0xf6, 0x7d, 0x48, 0x98, 0xc0) // vfmadd132ph zmm0,zmm0,zmm0
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RUAPU_INSTCODE(avxvnni, 0xc4, 0xe2, 0x7d, 0x52, 0xc0) // vpdpwssd ymm0,ymm0,ymm0
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RUAPU_INSTCODE(avxvnniint8, 0xc4, 0xe2, 0x7f, 0x50, 0xc0) // vpdpbssd ymm0,ymm0,ymm0
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RUAPU_INSTCODE(avxifma, 0xc4, 0xe2, 0xfd, 0xb4, 0xc0) // vpmadd52luq ymm0,ymm0,ymm0
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#elif __aarch64__ || defined(_M_ARM64)
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RUAPU_INSTCODE(neon, 0x4e20d400) // fadd v0.4s,v0.4s,v0.4s
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RUAPU_INSTCODE(vfpv4, 0x1f000000) // fmadd s0,s0,s0,s0
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RUAPU_INSTCODE(cpuid, 0xd5380000) // mrs x0,midr_el1
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RUAPU_INSTCODE(asimdrdm, 0x6e808400) // sqrdmlah v0.4s,v0.4s,v0.4s
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RUAPU_INSTCODE(asimdhp, 0x0e401400) // fadd v0.4h,v0.4h,v0.4h
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RUAPU_INSTCODE(asimddp, 0x4e809400) // sdot v0.4h,v0.16b,v0.16b
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RUAPU_INSTCODE(asimdfhm, 0x4e20ec00) // fmlal v0.4s,v0.4h,v0.4h
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RUAPU_INSTCODE(bf16, 0x6e40ec00) // bfmmla v0.4h,v0.8h,v0.8h
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RUAPU_INSTCODE(i8mm, 0x4e80a400) // smmla v0.4h,v0.16b,v0.16b
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RUAPU_INSTCODE(mte, 0xd96003e0) // ldg x0,[sp]
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RUAPU_INSTCODE(sve, 0x65608000) // fmad z0.h,p0/m,z0.h,z0.h
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RUAPU_INSTCODE(sve2, 0x44405000) // smlslb z0.h,z0.b,z0.b
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RUAPU_INSTCODE(svebf16, 0x6460e400) // bfmmla z0.s,z0.h,z0.h
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RUAPU_INSTCODE(svei8mm, 0x45009800) // smmla z0.s,z0.b,z0.b
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RUAPU_INSTCODE(svef32mm, 0x64a0e400) // fmmla z0.s,z0.s,z0.s
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RUAPU_INSTCODE(pmull, 0x0e20e000) // pmull v0.8h,v0.8b,v0.8b
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RUAPU_INSTCODE(crc32, 0x1ac04000) // crc32b w0,w0,w0
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RUAPU_INSTCODE(aes, 0x4e285800) // aesd v0.16b,v0.16b
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RUAPU_INSTCODE(sha1, 0x5e280800) // sha1h s0,s0
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RUAPU_INSTCODE(sha2, 0x5e004000) // sha256h q0,q0,v0.4s
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RUAPU_INSTCODE(sha3, 0xce000000) // eor3 v0.16b, v0.16b, v0.16b, v0.16b
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RUAPU_INSTCODE(sha512, 0xce608000) // sha512h q0, q0, v0.2d
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RUAPU_INSTCODE(sm3, 0xce60c000) // sm3partw1 v0.4s, v0.4s, v0.4s
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RUAPU_INSTCODE(sm4, 0xcec08400) // sm4e v0.4s, v0.4s
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RUAPU_INSTCODE(amx, 0x00201220) // amx setup
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#elif __arm__ || defined(_M_ARM)
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#if __thumb__
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RUAPU_INSTCODE(edsp, 0xfb20, 0x0000) // smlad r0,r0,r0,r0
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RUAPU_INSTCODE(neon, 0xef00, 0x0d40) // vadd.f32 q0,q0,q0
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RUAPU_INSTCODE(vfpv4, 0xeea0, 0x0a00) // vfma.f32 s0,s0,s0
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RUAPU_INSTCODE(idiv, 0x2003, 0xfb90, 0xf0f0) // movs r0,#3 + sdiv r0,r0,r0
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#else
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RUAPU_INSTCODE(edsp, 0xe7000010) // smlad r0,r0,r0,r0
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RUAPU_INSTCODE(neon, 0xf2000d40) // vadd.f32 q0,q0,q0
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RUAPU_INSTCODE(vfpv4, 0xeea00a00) // vfma.f32 s0,s0,s0
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RUAPU_INSTCODE(idiv, 0xe3a00003, 0xe710f010) // movs r0,#3 + sdiv r0,r0,r0
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#endif
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#elif __mips__
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RUAPU_INSTCODE(msa, 0x7900001b) // fmadd.w $w0,$w0,$w0
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#elif __powerpc__
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RUAPU_INSTCODE(vsx, 0x104210c0) // vaddudm v2,v2,v2
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#elif __s390x__
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RUAPU_INSTCODE(zvector, 0xe7, 0x11, 0x12, 0x00, 0x10, 0x8f) // vfmasb v1,v1,v1,v1
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#elif __loongarch__
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RUAPU_INSTCODE(lsx, 0x700b0000) //vadd.w vr0, vr0, vr0
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RUAPU_INSTCODE(lasx, 0x740b0000) //xvadd.w xr0, xr0, xr0
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#elif __riscv
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RUAPU_INSTCODE(i, 0x00a50533) // add a0,a0,a0
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RUAPU_INSTCODE(m, 0x00200513, 0x02a50533, 0x02a54533) // addi a0,x0,2 mul a0,a0,a0 div a0,a0,a0
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RUAPU_INSTCODE(a, 0x100122af, 0x185122af) // lr.w t0,(sp) + sc.w t0,t0,(sp)
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RUAPU_INSTCODE(f, 0x10a57553) // fmul.s fa0,fa0,fa0
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RUAPU_INSTCODE(d, 0x12a57553) // fmul.d fa0,fa0,fa0
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RUAPU_INSTCODE(c, 0x0001952a) // add a0,a0,a0 + nop
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RUAPU_INSTCODE(zfa, 0xf0108053) // fli.s ft0, min
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RUAPU_INSTCODE(zfh, 0x04007053); // fadd.hs ft0, ft0, ft0
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RUAPU_INSTCODE(zfhmin, 0xe4000553) // fmv.x.h a0, ft0
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RUAPU_INSTCODE(zicsr, 0xc0102573); // csrr a0, time
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RUAPU_INSTCODE(zifencei, 0x0000100f); // fence.i
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RUAPU_INSTCODE(zmmul, 0x02a50533) // mul a0,a0,a0
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#endif
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#undef RUAPU_INSTCODE
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struct ruapu_isa_entry
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{
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const char* isa;
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ruapu_some_inst inst;
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};
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#define RUAPU_ISAENTRY(isa) { #isa, (ruapu_some_inst)ruapu_some_##isa },
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struct ruapu_isa_entry g_ruapu_isa_map[] = {
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#if defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) || defined(_M_X64)
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RUAPU_ISAENTRY(mmx)
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RUAPU_ISAENTRY(sse)
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RUAPU_ISAENTRY(sse2)
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RUAPU_ISAENTRY(sse3)
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RUAPU_ISAENTRY(ssse3)
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RUAPU_ISAENTRY(sse41)
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RUAPU_ISAENTRY(sse42)
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RUAPU_ISAENTRY(sse4a)
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RUAPU_ISAENTRY(xop)
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RUAPU_ISAENTRY(avx)
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RUAPU_ISAENTRY(f16c)
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RUAPU_ISAENTRY(fma)
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RUAPU_ISAENTRY(fma4)
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RUAPU_ISAENTRY(avx2)
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RUAPU_ISAENTRY(avx512f)
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RUAPU_ISAENTRY(avx512bw)
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RUAPU_ISAENTRY(avx512cd)
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RUAPU_ISAENTRY(avx512dq)
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RUAPU_ISAENTRY(avx512vl)
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RUAPU_ISAENTRY(avx512vnni)
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RUAPU_ISAENTRY(avx512bf16)
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RUAPU_ISAENTRY(avx512ifma)
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RUAPU_ISAENTRY(avx512vbmi)
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RUAPU_ISAENTRY(avx512vbmi2)
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RUAPU_ISAENTRY(avx512fp16)
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RUAPU_ISAENTRY(avxvnni)
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RUAPU_ISAENTRY(avxvnniint8)
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RUAPU_ISAENTRY(avxifma)
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#elif __aarch64__ || defined(_M_ARM64)
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RUAPU_ISAENTRY(neon)
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RUAPU_ISAENTRY(vfpv4)
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RUAPU_ISAENTRY(cpuid)
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RUAPU_ISAENTRY(asimdrdm)
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RUAPU_ISAENTRY(asimdhp)
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RUAPU_ISAENTRY(asimddp)
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RUAPU_ISAENTRY(asimdfhm)
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RUAPU_ISAENTRY(bf16)
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RUAPU_ISAENTRY(i8mm)
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RUAPU_ISAENTRY(mte)
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RUAPU_ISAENTRY(sve)
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RUAPU_ISAENTRY(sve2)
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RUAPU_ISAENTRY(svebf16)
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RUAPU_ISAENTRY(svei8mm)
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RUAPU_ISAENTRY(svef32mm)
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RUAPU_ISAENTRY(pmull)
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RUAPU_ISAENTRY(crc32)
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RUAPU_ISAENTRY(aes)
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RUAPU_ISAENTRY(sha1)
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RUAPU_ISAENTRY(sha2)
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RUAPU_ISAENTRY(sha3)
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RUAPU_ISAENTRY(sha512)
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RUAPU_ISAENTRY(sm3)
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RUAPU_ISAENTRY(sm4)
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RUAPU_ISAENTRY(amx)
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#elif __arm__ || defined(_M_ARM)
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RUAPU_ISAENTRY(edsp)
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RUAPU_ISAENTRY(neon)
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RUAPU_ISAENTRY(vfpv4)
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RUAPU_ISAENTRY(idiv)
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#elif __mips__
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RUAPU_ISAENTRY(msa)
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#elif __powerpc__
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RUAPU_ISAENTRY(vsx)
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#elif __s390x__
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RUAPU_ISAENTRY(zvector)
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#elif __loongarch__
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RUAPU_ISAENTRY(lsx)
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RUAPU_ISAENTRY(lasx)
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#elif __riscv
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RUAPU_ISAENTRY(i)
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RUAPU_ISAENTRY(m)
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RUAPU_ISAENTRY(a)
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RUAPU_ISAENTRY(f)
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RUAPU_ISAENTRY(d)
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RUAPU_ISAENTRY(c)
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RUAPU_ISAENTRY(zfa)
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RUAPU_ISAENTRY(zfh)
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RUAPU_ISAENTRY(zfhmin)
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RUAPU_ISAENTRY(zicsr)
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RUAPU_ISAENTRY(zifencei)
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RUAPU_ISAENTRY(zmmul)
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#elif __openrisc__
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RUAPU_ISAENTRY(orbis32)
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RUAPU_ISAENTRY(orbis64)
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RUAPU_ISAENTRY(orfpx32)
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RUAPU_ISAENTRY(orfpx64)
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RUAPU_ISAENTRY(orvdx64)
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#endif
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};
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#undef RUAPU_ISAENTRY
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const char* g_ruapu_isa_supported[sizeof(g_ruapu_isa_map) / sizeof(g_ruapu_isa_map[0]) + 1] = { 0 };
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#if defined __openrisc__
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static void ruapu_detect_openrisc_isa()
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{
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uint32_t value;
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uint16_t addr = U(0x0000);
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asm volatile ("l.mfspr %0, r0, %1" : "=r" (value) : "K" (addr));
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size_t j = 0;
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for (size_t i = 0; i < sizeof(g_ruapu_isa_map) / sizeof(g_ruapu_isa_map[0]); i++)
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{
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int capable = ((value) >> (5 + i)) & 0x1;
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if (capable)
|
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{
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g_ruapu_isa_supported[j] = g_ruapu_isa_map[i].isa;
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j++;
|
|
}
|
|
}
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g_ruapu_isa_supported[j] = 0;
|
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}
|
|
#endif
|
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|
|
void ruapu_init()
|
|
{
|
|
#if defined _WIN32 || defined __ANDROID__ || defined __linux__ || defined __APPLE__ || defined __FreeBSD__ || defined __NetBSD__ || defined __OpenBSD__
|
|
size_t j = 0;
|
|
for (size_t i = 0; i < sizeof(g_ruapu_isa_map) / sizeof(g_ruapu_isa_map[0]); i++)
|
|
{
|
|
int capable = ruapu_detect_isa(g_ruapu_isa_map[i].inst);
|
|
if (capable)
|
|
{
|
|
g_ruapu_isa_supported[j] = g_ruapu_isa_map[i].isa;
|
|
j++;
|
|
}
|
|
}
|
|
g_ruapu_isa_supported[j] = 0;
|
|
#elif defined __openrisc__
|
|
ruapu_detect_openrisc_isa();
|
|
#else
|
|
// initialize g_ruapu_isa_map for baremetal here, default all zero
|
|
// there is still ruapu_some_XYZ() functions available
|
|
// but you have to work out your own signal handling
|
|
#warning ruapu does not support your baremetal os yet
|
|
#endif
|
|
}
|
|
|
|
int ruapu_supports(const char* isa)
|
|
{
|
|
const char* const* isa_supported = g_ruapu_isa_supported;
|
|
while (*isa_supported)
|
|
{
|
|
if (strcmp(*isa_supported, isa) == 0)
|
|
return 1;
|
|
|
|
isa_supported++;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
const char* const* ruapu_rua()
|
|
{
|
|
return g_ruapu_isa_supported;
|
|
}
|
|
|
|
#endif // RUAPU_IMPLEMENTATION
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif // RUAPU_H
|