From 1ba59632e145cc14250d5cc0714201df6284f5a6 Mon Sep 17 00:00:00 2001 From: nihui Date: Wed, 21 Feb 2024 14:44:44 +0800 Subject: [PATCH] Update README.md --- README.md | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/README.md b/README.md index e47f26a..842e83f 100644 --- a/README.md +++ b/README.md @@ -2,7 +2,7 @@ Detect cpu ISA features with single-file -
CPU ✅ x86, x86-64
✅ arm, aarch64		 +
CPU✅ x86, x86-64
✅ arm, aarch64		 ```c #define RUAPU_IMPLEMENTATION @@ -67,14 +67,23 @@ xop = 0
+## Features + +* Detect **CPU ISA with single-file**    +_x86-sse, x86-avx, x86-avx512f, x86-avxvnni, arm-neon, etc._ +* Detect **vendor extended ISA**     +_apple `amx`, risc-v vendor ISA, etc._ +* Detect **richer ISA on Windows ARM**   +_`IsProcessorFeaturePresent()` returns little ISA information_ +* Detect **`x86-avx512` on macOS correctly**  +_macOS hides it in `cpuid`_ +* Detect **new CPU's ISA on old systems**  +_they are usually not exposed in `auxv` or `MISA`_ +* Detect **CPU hidden ISA**        +_`x86-fma4` on zen1, ISA in hypervisor, etc._ + ## Techniques inside ruapu ruapu is implemented in C language to ensure the widest possible portability. ruapu determines whether the CPU supports certain instruction sets by trying to execute instructions and detecting whether an `Illegal Instruction` exception occurs. ruapu does not rely on the cpuid instructions and registers related to the CPU architecture, nor does it rely on the `MISA` information and system calls of the operating system. This can help us get more detailed CPU ISA information. -- Detect vendor extended ISA, apple `amx`, risc-v vendor ISA, etc. -- Checking for richer isa on Windows ARM, `IsProcessorFeaturePresent()` can only get little ISA information -- Correctly detect `x86-avx512` for macOS, macOS hides it in `cpuid` -- Detect new cpu's ISA on older systems, they are usually not exposed in `auxv` or `MISA` -- Detect CPU hidden ISA, `x86-fma4` on zen1, ISA in hypervisor, etc. -